I am a Ph.D. candidate in the Department of Electrical Engineering at Princeton University, working with Prof. Sharad Malik. My research focuses on applying formal methods in accelerator-rich computing platforms, especially software/hardware co-verification and co-synthesis. I also work on security verification of systems in practical scales targeting vulnerabilities spanning across the software and hardware boundary. My current focus is automatic firmware/driver synthesis for ML/Crypto accelerators.
Before coming to Princeton, I received my BS in Electrical Engineering from National Taiwan University.
Bo-Yuan Huang, Marina Polishchuk, and Patrice Godefroid
The ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering (ESEC/FSE), 2020
Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, and Sharad Malik
International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS), 2019 [pdf]
Yue Xing, Bo-Yuan Huang, Aarti Gupta, and Sharad Malik
International Conference on Computer-Aided Design (ICCAD), 2018 [pdf]
Bo-Yuan Huang, Sayak Ray, Aarti Gupta, Jason Fung, and Sharad Malik
Design Automation Conference (DAC), 2018 [pdf]
Bo-Yuan Huang, Yi-Hsiang Lai, and Jie-Hong Roland Jiang
IEEE International Conference on Computer Aided Design (ICCAD), 2015 [pdf]
Bo-Yuan Huang, Shih-Tang Su, Chih-Yu Wang, Che-Wei Teh, and Hung-Yu Wei
IEEE International Conference on Communications (ICC), 2014 [pdf]
Bo-Yuan Huang, Yue Xing, Hongce Zhang, Huaixi Lu, Yi Li, Aarti Gupta, and Sharad Malik
In submission to IEEE Micro.
Bo-Yuan Huang, Hongce Zhang, Pramod Subramanyan, Yakir Vizel, Aarti Gupta, and Sharad Malik
ACM Transactions on Design Automation of Electronic Systems (TODAES), 2018 [pdf]
Pramod Subramanyan, Bo-Yuan Huang, Yakir Vizel, Aarti Gupta, and Sharad Malik
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2018 [pdf]
Shih-Tang Su, Bo-Yuan Huang, Chih-Yu Wang, Che-Wei Teh, and Hung-Yu Wei
IEEE Transactions on Vehicular Technology (TVT), 2016 [pdf]
Intelligent REST API data fuzzing of JSON-payloads.
Grammar-based fuzzing with learning from dynamic feedback.
White-box fuzzing for attacker-memory-safety in OS kernel packet/file parsers.
Kernel-aware memory checker and symbolic pointer reasoning.
Concurrent firmware verification with LLVM/Boogie-based software verification tools.
Exploiting security properties in inter-IPs communication in an industrial SoC design.
Research on ILA-based SoC firmware verification methodology.
Exploiting security properties in SoC secure-boot features.
Develop Electronic Design Automation (EDA) tools for the Advanced Process Transferring Group.
Programming training for research-develop engineers
CS Department ReMatch+ Research Program, Summer 2020
Advisor: Prof. Sharad Malik
Parallel SAT Solving with Localized Learnt Clauses Sharing
CS Department Visiting Student, Spring 2018
Advisor: Prof. Aarti Gupta
Hardware Description (Verilog) Generation for Instruction-Level Abstraction (ILA)
EE Department Senior Thesis, Fall 2016 - Spring 2017
Advisor: Prof. Sharad Malik
Software/Hardware Co-Verification: Google Verified Boot Firmware with Trusted Platform Module